Publications

Trident: Efficient FPGA Acceleration of XMSS Tree in Post-Quantum Signature Scheme SLH-DSA

Tianyou Bao, Joshua Ennis, Kirill Morozov, Jiafeng Xie

2026 IEEE 34th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 222–230

CEDAR: A Compact and Efficient Decoder Architecture for RS-RM Code in HQC

Yazheng Tu^*, Tianyou Bao^*, Jiafeng Xie

2026 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 4714–4718

High-Performance Instruction-Set Hardware Accelerator for Ring-Binary-LWE-Based Lightweight PQC

Pengzhou He^*, Tianyou Bao^*, Jiafeng Xie

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 5, pp. 1417–1421

Efficient Post-Quantum Cryptographic Hardware for Healthcare Applications

Samuel Coulon, Tianyou Bao, Jiafeng Xie

2025 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5

Invited Paper: Enhancing Privacy-Preserving Computing with Optimized CKKS Encryption: A Hardware Acceleration Approach

Tianyou Bao, Pengzhou He, Jiafeng Xie

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1–9

CHIRP: Compact and High-Performance FPGA Implementation of Unified Hardware Accelerators for Ring-Binary-LWE-based PQC

Tianyou Bao, Pengzhou He, Daisuke Fujimoto, Yuichi Hayashi, Jiafeng Xie

ACM Transactions on Reconfigurable Technology and Systems (FPT'24 Journal Track), vol. 18, no. 2, pp. 19:1–19:27

LTE: Lightweight and Timing-Efficient Unequal-Sized Polynomial Multiplication Accelerators

Yazheng Tu, Tianyou Bao, Pengzhou He, Leonel Sousa, Jiafeng Xie

IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 72, no. 1, pp. 253–257

HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography

Pengzhou He^*, Yazheng Tu^*, Tianyou Bao^*, Çetin Kaya Koç, Jiafeng Xie

ACM Transactions on Embedded Computing Systems, vol. 24, no. 1, pp. 16:1–16:24

FELIX: FPGA-Based Scalable and Lightweight Accelerator for Large Integer Extended GCD

Samuel Coulon, Tianyou Bao, Jiafeng Xie

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 9, pp. 1684–1695

SCALES: SCALable and Area-Efficient Systolic Accelerator for Ternary Polynomial Multiplication

Samuel Coulon, Tianyou Bao, Jiafeng Xie

IEEE Computer Architecture Letters, vol. 23, no. 2, pp. 243–246

HELP: Highly Efficient and Low-Latency Hardware Accelerator for Integer Polynomial Multiplication

Pengzhou He, Tianyou Bao, Çetin Kaya Koç, Jiafeng Xie

2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 355–360

TINA: TMVP-Initiated Novel Accelerator for Lightweight Ring-LWE-Based PQC

Tianyou Bao, Pengzhou He, Shi Bai, Jiafeng Xie

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 5, pp. 870–882

AEKA: FPGA Implementation of Area-Efficient Karatsuba Accelerator for Ring-Binary-LWE-Based Lightweight PQC

Tianyou Bao, Pengzhou He, Jiafeng Xie, H. S. Jacinto

ACM Transactions on Reconfigurable Technology and Systems (FPT'23 Journal Track), vol. 17, no. 2, pp. 29:1–29:23

CASA: A Compact and Scalable Accelerator for Approximate Homomorphic Encryption

Pengzhou He, Samira Carolina Oliva Madrigal, Çetin Kaya Koç, Tianyou Bao, Jiafeng Xie

IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2024, no. 2, pp. 451–480

Efficient Hardware RNS Decomposition for Post-Quantum Signature Scheme Falcon

Samuel Coulon, Pengzhou He, Tianyou Bao, Jiafeng Xie

2023 57th Asilomar Conference on Signals, Systems, and Computers, pp. 19–26

FPGA Implementation of Compact Hardware Accelerators for Ring-Binary-LWE-based Post-quantum Cryptography

Pengzhou He, Tianyou Bao, Jiafeng Xie, Moeness Amin

ACM Transactions on Reconfigurable Technology and Systems (FPT'22 Journal Track), vol. 16, no. 3, pp. 45:1–45:23

Efficient Implementation of Ring-Binary-LWE-based Lightweight PQC Accelerator on the FPGA Platform

Pengzhou He^*, Tianyou Bao^*, Yazheng Tu, Jiafeng Xie

2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 114–120

COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC

Pengzhou He, Yazheng Tu, Tianyou Bao, Leonel Sousa, Jiafeng Xie

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 4, pp. 596–600

Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography

Tianyou Bao, José Luis Imaña, Pengzhou He, Jiafeng Xie

2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), pp. 5–6

HPMA-Saber: High-Performance Polynomial Multiplication Accelerator for KEM Saber

Pengzhou He, Tianyou Bao, Yazheng Tu, Jiafeng Xie

2022 IEEE 40th International Conference on Computer Design (ICCD), pp. 525–528

Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

José Luis Imaña^*, Pengzhou He^*, Tianyou Bao, Yazheng Tu, Jiafeng Xie

IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 8, pp. 3297–3307

Systolic Acceleration of Polynomial Multiplication for KEM Saber and Binary Ring-LWE Post-Quantum Cryptography

Tianyou Bao, Pengzhou He, Jiafeng Xie

2022 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 157–160

Ultra Low-Complexity Implementation of Binary Ring-LWE based Post-Quantum Cryptography on FPGA Platform

Jiafeng Xie, Pengzhou He, Tianyou Bao

Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '22), pp. 156

Secure Augmented Reality (AR) for Telehealth and Emergency Medical Services (EMS): A Survey

Tianyou Bao, H. Ok

The George Washington University, Cyber Security and Privacy Research Institute, no. GWU-CSPRI-2021-05

A New Optimized Queueing Model with Compensation and Buffer

Tianyou Bao^*, Jingsong Li^*, Hanxing Hu, Shi'ang Li, Yu Meng, Changjiang Zhang

2018 IEEE International Conference on Bioinformatics and Biomedicine (BIBM), pp. 1452–1456